Working Student - 5G L1 FPGA Design Engineer
Krakow, Poland, Poland
4 d. temu

Daily activities

As part of our team you will contribute torequirements analysis and decomposition, design, implementation andverification of FPGA IP components for 5G telecommunication system.

You will beresponsible for creating design in RTL code, verification of IP components inUVM, problems investigations and ensuring quality of provided IP Components.

You will develop extensive knowledge of 5G systemphysical layer, Nokia hardware platforms and the way our customers aredeploying them.

You will contribute to develop innovative solutions to addressNokia strategy in the 5G domain and beyond.

This is an offer for workingstudents (students aged below 26).

We work with : · Verilog, VHDL · System Verilog and UVM · Questa, Quartus · Git, IDM · Linux · Artifactory · JIRA

  • Continuous integrationsystems
  • Our expectations :

  • Education : on-going studiesor BSC / Engineer in : Telecommunication, Computer Science,Electronics or a similar subject
  • Good knowledge of English (bothspoken and written)
  • Knowledge of FPGA designs and FPGAEDA tools (Quartus / Vivado)
  • Knowledge of Ethernet standard isan advantage
  • Knowledge of 4G / 5G standard is anadvantage
  • Knowledge of version controlsystems (GIT, SVN)
  • Understanding and ability to workwith technical documentation for digital systems (microprocessors, integratedcircuits, embedded systems)
  • Ability to analytical thinking andsolve technical problems
  • Zgłoś tę pracę

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