IP Cores systemization (regular)
Join us as a Senior FPGA Developer and through your efforts build next-generation mobile network infrastructure on US market!
You'll work with top leading players and open initiatives to provide 5G RUs over fronthaul networks that work with virtualized baseband units from several vendors.
Together we'll form advanced e2e connectivity solutions fit for the modern era!
Skills & Qualifications :
O-RAN and C-RAN knowledge is a must.
Strong knowledge of FPGA tool flows; Synthesis, Partitioning, Place & Route : Xilinx Vivado HLx and Intel FPGA Quartus Prime Standard / ProEdition .
Knowledge of multi-gigabit interface protocols ( Ethernet, SGMII, RGMII ), memory technologies (DDR3, DDR4), interconnect protocols (PCIe),digital logics, and common communication interfaces (UART, USB, SPI, I2C).
Skilled in digital frontend design (DSP, CFR, DPD, Up and Down Converters, Digital Filters).
Electronic Circuit & System Design Fundamentals including analog, digital, and power.
Knowledge of FPGA / ARM and IP Cores systemization.
Circuit and System Simulation ( Matlab , PSpice ) Competence.
Proficient with scripting languages such as Tcl or Python, and programming languages such as C / C++ including low-level programming (firmware) of complex computer systems and mixing HDL with C / C++ for simulation purposes.
Knowledge of SystemC (IEEE 1666-2011), UVM (IEEE 1800.2-2017) and / or SystemC-AMS (IEEE 1666.1-2016) is a plus.
Detailed Knowledge of laboratory measurements using equipment such as Oscilloscope, Signal Generator, Signal Analyser.
Experience with tools such as SVN, Git, and familiarity with 1588 and SyncE standards
Salary 26000 PLN / NET / B2B
Work 100 % remotely with International Team
It's so easy - all you have to do is apply. Don't wait - let's talk!